The birth of the Soviet missile defense system. Greatest modular computer

The birth of the Soviet missile defense system. Greatest modular computer
The birth of the Soviet missile defense system. Greatest modular computer

The city of Dreams

So, in 1963, a microelectronics center was opened in Zelenograd.

By the will of fate, Lukin, an acquaintance of the Minister Shokin, becomes its director, and not Staros (while Lukin was never seen in dirty intrigues, on the contrary - he was an honest and straightforward person, ironically, it so coincided that it was his adherence to principles that helped him take this post, because of her, he quarreled with the previous boss and left, and Shokin needed at least someone instead of Staros, whom he hated).

For SOK machines, this meant takeoff (at least, they thought so at first) - now they could, using Lukin's constant support, be implemented using microcircuits. For this purpose, he took Yuditsky and Akushsky to Zelenograd, together with a team of K340A developers, and they formed a department of advanced computers at NIIFP. For almost 1, 5 years there were no specific tasks for the department, and they spent their time having fun with the T340A model, which they took with them from NIIDAR, and pondering future developments.

It should be noted that Yuditsky was an extremely educated person with a broad outlook, was actively interested in the latest scientific achievements in various fields indirectly related to computer science, and assembled a team of very talented young specialists from different cities. Under his patronage, seminars were held not only on modular arithmetic, but also on neurocybernetics and even biochemistry of nerve cells.

As V.I Stafeev recalls:

By the time I came to NIIFP as a director, thanks to the efforts of Davlet Islamovich, it was still a small, but already functioning institute. The first year was devoted to finding a common language of communication between mathematicians, cybernetics, physicists, biologists, chemists … This was the period of the ideological formation of the collective, which Yuditsky, his blessed memory, aptly called the "Period of singing revolutionary songs" on the topic: "How cool this is do!" As mutual understanding was reached, serious joint research was launched in the accepted directions.

It was at this moment that Kartsev and Yuditsky met and became friends (relations with Lebedev's group somehow did not work out due to their elitism, closeness to power and unwillingness to study such unorthodox machine architectures).

As M. D. Kornev recalls:

Kartsev and I had regular meetings of the Scientific and Technical Council (Scientific and Technical Council), at which specialists discussed the ways and problems of building computers. We usually invited each other to these meetings: we went to them, they - to us, and actively participated in the discussion.

In general, if these two groups were given academic freedom, unthinkable for the USSR, it would be difficult to even think about what technical heights they would eventually be brought to and how they would change computer science and hardware design.

Finally, in 1965, the Council of Ministers decided to complete the Argun multichannel firing complex (MKSK) for the second stage of the A-35. According to preliminary estimates, the ISSC required a computer with a capacity of about 3.0 million tons of oil equivalent. "Algorithmic" operations per second (a term that is generally extremely difficult to interpret, meant operations for processing radar data). As NK Ostapenko recalled, one algorithmic operation on MKSK problems corresponded to approximately 3-4 simple computer operations, that is, a computer with a performance of 9-12 MIPS was needed.At the end of 1967, even the CDC 6600 was beyond the capacity of the CDC 6600.

The theme was submitted for the competition to three enterprises at once: the Microelectronics Center (Minelektronprom, F.V. Lukin), ITMiVT (Ministry of Radio Industry, S.A. Lebedev) and INEUM (Minpribor, M.A.Kartsev).

Naturally, Yuditsky got down to business in the CM, and it is easy to guess which scheme of the machine he chose. Note that of the real designers of those years, only Kartsev with his unique machines, which we will talk about below, could compete with him. Lebedev was completely out of the question, both supercomputers and such radical architectural innovations. His student Burtsev designed machines for the A-35 prototype, but in terms of productivity they were not even close to what was needed for a complete complex. The computer for the A-35 (except for reliability and speed) had to work with words of variable length and several instructions in one command.

Note that NIIFP had an advantage in the element base - unlike the Kartsev and Lebedev groups, they had direct access to all microelectronic technologies - they themselves developed them. At this time, the development of a new GIS "Ambassador" (later series 217) began at NIITT. They are based on a packageless version of the transistor developed in the mid-60s by the Moscow Research Institute of Semiconductor Electronics (now NPP Pulsar) on the topic of “Parabola”. The assemblies were produced in two versions of the element base: on transistors 2T318 and diode matrices 2D910B and 2D911A; on transistors KTT-4B (hereinafter 2T333) and diode matrices 2D912. Distinctive features of this series in comparison with thick-film schemes "Path" (201 and 202 series) - increased speed and noise immunity. The first assemblies in the series were LB171 - logic element 8I-NOT; 2LB172 - two logical elements 3I-NOT and 2LB173 - logical element 6I-NOT.

In 1964, it was already a lagging, but still living technology, and the system architects of the Almaz project (as the prototype was christened) had the opportunity not only to immediately put these GIS into operation, but also to influence their composition and characteristics, in fact, ordering under yourself custom chips. Thus, it was possible to increase the speed many times over - the hybrid circuits fit into a 25–30 ns cycle, instead of 150.

Surprisingly, the GIS developed by Yuditsky's team was faster than real microcircuits, for example, the 109, 121 and 156 series, developed in 1967-1968 as an element base for submarine computers! They did not have a direct foreign analogue, since it was far from Zelenograd, series 109 and 121 were produced by Minsk factories Mion and Planar and Lvov's Polaron, 156 series - by Vilnius Research Institute Venta (on the periphery of the USSR, far from ministers, in general, a lot of interesting things were happening). Their performance was about 100 ns. Series 156, by the way, became famous for the fact that on its basis a completely chthonic thing was assembled - a multicrystal GIS, known as the 240 series "Varduva", developed by the Vilnius Design Bureau MEP (1970).

In the West, at that time, full-fledged LSIs were being produced, in the USSR, 10 years remained until this level of technology, and I really wanted to get LSIs. As a result, they made a kind of ersatz from a heap (up to 13 pieces!) Of chipless microcircuits of the smallest integration, separated on a common substrate in a single package. It is difficult to say which is more in this decision - ingenuity or technoschizophrenia. This miracle was called "hybrid LSI" or simply GBIS, and we can proudly say about it that such a technology had no analogues in the world, if only because no one else needed to be so perverted (which is only two (!) supply voltage, + 5V and + 3V, which were needed for the work of this miracle of engineering). To make it completely fun, these GBIS were combined on one board, getting, again, a kind of ersatz of multi-chip modules, and used to assemble ship computers of the Karat project.


Returning to the Almaz project, we note that it was much more serious than the K340A: both the resources and the teams involved in it were colossal.The NIIFP was responsible for the development of the architecture and the computer processor, the NIITM - the basic design, the power supply system and the data input / output system, and the NIITT - the integrated circuits.

Along with the use of modular arithmetic, another architectural method was found to significantly increase overall performance: a solution that was widely used later in signal processing systems (but unique at that time and the first in the USSR, if not in the world) - the introduction of a DSP coprocessor into the system, and of our own design!

As a result, "Almaz" consisted of three main blocks: a single-task DSP for preliminary processing of the radar data, a programmable modular processor that performs calculations of missile guidance, a programmable real coprocessor that performs non-modular operations, mainly related to computer control.

The addition of DSP led to a decrease in the required power of the modular processor by 4 MIPS and saving about 350 KB of RAM (almost twice). The modular processor itself had a performance of about 3.5 MIPS - one and a half times higher than the K340A. The draft design was completed in March 1967. The foundations of the system were left the same as in the K340A, the memory capacity was increased to 128K 45-bit words (approximately 740 KB). Processor cache - 32 55-bit words. The power consumption has been reduced to 5 kW, and the volume of the machine has been reduced to 11 cabinets.

Academician Lebedev, having familiarized himself with the works of Yuditsky and Kartsev, immediately withdrew his version from consideration. In general, what was the problem of the Lebedev group is a little unclear. More precisely, it is not clear what kind of vehicle they removed from the competition, because at the same time they were developing the predecessor of Elbrus - 5E92b, just for the missile defense mission.

In fact, by that time, Lebedev himself had completely turned into a fossil and could not offer any radically new ideas, especially those superior to SOC machines or Kartsev's vector computers. Actually, his career ended at BESM-6, he did not create anything better and more serious and either supervised the development purely formally, or hindered more than helped the Burtsev group, who were engaged in Elbrus and all ITMiVT military vehicles.

However, Lebedev had a powerful administrative resource, being someone like Korolyov from the world of computers - an idol and an unconditional authority, so if he really wanted to push his car, he could easily, no matter what it was. Oddly enough, he didn't. 5E92b, by the way, was put into service, maybe it was that project? In addition, a little later, its modernized version 5E51 and a mobile version of the computer for air defense 5E65 were released. At the same time, E261 and 5E262 appeared. It is a little unclear why all sources say that Lebedev did not participate in the final competition. Even stranger, the 5E92b was manufactured, delivered to the landfill and connected to the Argun as a temporary measure until Yuditsky's car was finished. In general, this secret is still waiting for its researchers.

There are two projects left: Almaz and M-9.


Kartsev can be accurately described with just one word - genius.

The M-9 surpassed almost everything (if not everything) that was even in the blueprints all over the world at that time. Recall that the terms of reference included a performance of about 10 million operations per second, and they were able to squeeze this out of Almaz only through the use of DSP and modular arithmetic. Kartsev squeezed out of his car without all this billion… It was truly a world record, unbroken until the Cray-1 supercomputer appeared ten years later. Reporting on the M-9 project in 1967 in Novosibirsk, Kartsev joked:

the M-220 is called so because it has a productivity of 220 thousand operations / s, and the M-9 is so called because it provides a productivity of 10 to the 9th power of operations / s.

One question arises - but how?

Kartsev proposed (for the first time in the world) a very sophisticated processor architecture, a complete structural analogue of which has never been created.It looked partly like Inmos systolic arrays, partly like Cray and NEC vector processors, partly like the Connection Machine - the iconic supercomputer of the 1980s, and even modern graphics cards. M-9 had an amazing architecture, for which there was not even an adequate language to describe, and Kartsev had to introduce all the terms on his own.

His main idea was to build a computer operating a class of objects that is fundamentally new for machine arithmetic - functions of one or two variables, given pointwise. For them, he defined three main types of operators: operators that assign a third to a pair of functions, operators that return a number as a result of an action on a function. They worked with special functions (in modern terminology - masks) that took the values ​​0 or 1 and served to select a subarray from a given array, operators that return, as a result of an action on a function, an array of values ​​associated with this function.

The car consisted of three pairs of blocks, which Kartsev called "bundles", although they were more like lattices. Each pair included a computing unit of a different architecture (the processor itself) and a mask calculation unit for it (corresponding architecture).

The first bundle (the main, "functional block") consisted of a computing core - a matrix of 32x32 16-bit processors, similar to the INMOS transputers of the 1980s, with its help it was possible to carry out in one clock cycle all the basic operations of linear algebra - multiplication of matrices and vectors in arbitrary combinations and their addition.

It was only in 1972 that an experimental massively parallel computer Burroughs ILLIAC IV was built in the USA, somewhat similar in architecture and comparable performance. General arithmetic chains could perform summation with the accumulation of the result, which made it possible, if necessary, to process matrices of dimension more than 32. The operators executed by the lattice of processors of the functional link could be imposed a mask limiting execution only to labeled processors. The second unit (called by Kartsev "picture arithmetic") worked together with it, it consisted of the same matrix, but one-bit processors for operations on masks ("pictures", as they were called then). A wide range of operations was available over the paintings, also performed in one cycle and described by linear deformations.

The second bundle expanded the capabilities of the first one and consisted of a vector coprocessor of 32 nodes. It had to perform operations on one function or a pair of functions specified at 32 points, or operations on two functions or on two pairs of functions specified at 16 points. For it there was similarly its own mask block, called "feature arithmetic".

The third (also optional) bunch consisted of an associative block performing comparison and sorting operations on subarrays by content. A pair of masks also went to her.

The machine could consist of various sets, in the basic configuration - just a functional block, in the maximum - eight: two sets of functional and picture arithmetic and one set of others. In particular, it was assumed that the M-10 consists of 1 block, the M-11 - of eight. The performance of this option was superior two billion operations per second.

To finally finish off the reader, we note that Kartsev provided for the synchronous combination of several machines into one supercomputer. With such a combination, all machines were started from a single clock generator and performed operations on matrices of huge dimensions in 1–2 clock cycles. At the end of the current operation and at the beginning of the next, it was possible to exchange between any arithmetic and storage devices of the machines integrated into the system.

As a result, Kartsev's project was a real monster. Something similar, from an architectural point of view, appeared in the West only in the late 1970s in the works of Seymour Cray and the Japanese from NEC.In the USSR, this machine was absolutely unique and architecturally superior not only to all developments of those years, but in general to everything that was produced in our entire history. There was only one problem - no one was going to implement it.

The birth of the Soviet missile defense system. Greatest modular computer


The competition was won by the Almaz project. The reasons for this are vague and incomprehensible and are associated with traditional political games in various ministries.

Kartsev, at a meeting dedicated to the 15th anniversary of the Research Institute of Computer Complexes (NIIVK), in 1982 said:

In 1967 we came out with a rather daring project for the M-9 computer complex …

For the USSR Ministry of Instrument, where we were then staying, this project turned out to be too much …

We were told: go to V. D. Kalmykov, since you are working for him. The M-9 project remained unfulfilled …

In fact, Kartsev's car was too much good for the USSR, its appearance would simply boldly leave the board of all other players, including the mighty bunch of Lebedevites from ITMiVT. Naturally, no one would have allowed some upstart Kartsev to surpass the sovereign's favorites repeatedly showered with awards and favors.

Note that this competition not only did not destroy the friendship between Kartsev and Yuditsky, but even more united these different, but in their own way, brilliant architects. As we remember, Kalmykov was categorically against both the missile defense system and the idea of ​​a supercomputer, and as a result, Kartsev's project was quietly merged, and the Ministry of Pribor refused to continue work on creating powerful computers altogether.

Kartsev's team was asked to move to the MRP, which he did in mid-1967, forming a branch number 1 of OKB Vympel. Back in 1958, Kartsev worked on the order of the well-known academician A. L. Mints from the RTI, who was engaged in the development of missile attack warning systems (this eventually resulted in completely chthonic, unimaginably expensive and absolutely useless over-the-horizon radars of the Duga project, which are not had time to really put it into operation, as the USSR collapsed). In the meantime, the people from RTI remained relatively sane and Kartsev finished the M-4 and M4-2M machines for them (by the way, it is very, very strange that they were not used for missile defense!).

Further history reminds of a bad anecdote. The M-9 project was rejected, but in 1969 he was given a new order based on his machine, and in order not to rock the boat, they gave all of his design bureau to the subordination of Mints from the Kalmyk department. M-10 (final index 5E66 (attention!) - in many sources it was absolutely mistakenly attributed to the SOK architecture) was forced to compete with Elbrus (which, however, she cut like a Xeon microcontroller) and, what is even more striking, it was again played off with Yuditsky's cars, and as a result, Minister Kalmykov performed an absolutely brilliant multi-move.

First, the M-10 helped him to fail the serial version of the Almaz, and then it was declared unsuitable for missile defense, and the Elbrus won a new competition. As a result, from the shock of all this dirty political struggle, the unfortunate Kartsev received a heart attack and died suddenly, before he was 60 years old. Yuditsky briefly outlived his friend, dying that same year. Akushsky, his partner, by the way, did not overwork and died as a member of the correspondent, treated kindly by all the awards (Yuditsky only grew up to a doctor of technical sciences), in 1992 at the age of 80. So with one blow Kalmykov, who fiercely hated Kisunko and in the end failed his missile defense project, slammed two, probably the most talented computer developers in the USSR and some of the best in the world. We will consider this story in more detail later.

In the meantime, we will return to the winner on the ABM topic - the Almaz vehicle and its descendants.

Naturally, "Almaz" was a very good computer for its narrow tasks and had an interesting architecture, but comparing it with the M-9 was, to put it mildly, incorrect, too different classes. Nevertheless, the competition was won, and an order was received for the design of an already serial machine 5E53.

To carry out the project, Yuditsky's team in 1969 was separated into an independent enterprise - the Specialized Computing Center (SVC).Yuditsky himself became the director, the deputy for scientific work - Akushsky, who, like a sticky fish, "participated" in every project until the 1970s.

Note again that his role in the creation of SOK machines is completely mystical. Absolutely everywhere he is mentioned number two after Yuditsky (and sometimes the first), while he held posts related to something incomprehensible, all his works on modular arithmetic are exclusively co-authored, and what exactly did he do during the development of "Almaz" and 5E53 it is generally not clear - the architect of the machine was Yuditsky, the algorithms were also developed by completely separate people.

It is worth noting that Yuditsky had very few publications about RNS and modular arithmetic algorithms in the open press, mainly because these works were classified for a long time. Also, Davlet Islamovich was distinguished by simply phenomenal scrupulousness in publications and never put himself a co-author (or worse, the first co-author, as almost all Soviet directors and bosses adored to do) in any work of his subordinates and graduate students. According to his recollections, he usually replied to proposals of this kind:

Did I write something there? No? Then take my last name away.

So, in the end, it turned out that in 90% of domestic sources, Akushsky is considered the main and main father of SOK, who, on the contrary, has no work without co-authors, because, according to the Soviet tradition, he pasted his name on everything that all his subordinates did.


The implementation of 5E53 required a titanic effort on the part of a huge team of talented people. The computer was designed to select real targets among false ones and aim anti-missiles at them, the most computationally difficult task that then faced the computing technology of the world. For three ISSCs of the second stage of A-35, the productivity was refined and increased 60 times (!) To 0.6 GFLOP / s. This capacity was supposed to be provided by 15 computers (5 in each ISSK) with a performance on missile defense tasks of 10 million algorithmic op / s (about 40 million conventional op / s), 7.0 Mbit RAM, 2, 9 Mbit EPROM, 3 Gbit VZU and data transmission equipment for hundreds of kilometers. The 5E53 should be significantly more powerful than the Almaz and be one of the most powerful (and certainly the most original) machines in the world.

V.M. Amerbaev recalls:

Lukin appointed Yuditsky as the chief designer of the 5E53 product, entrusting him with the leadership of the SVTs. Davlet Islamovich was a true chief designer. He delved into all the details of the project being developed, from the production technology of new elements to structural solutions, computer architecture and software. In all areas of his intense work, he was able to pose such questions and tasks, the solution of which led to the creation of new original blocks of the designed product, and in a number of cases Davlet Islamovich himself indicated such solutions. Davlet Islamovich worked on his own, regardless of time or circumstances, just like all his comrades in labor. It was a stormy and bright time, and, of course, Davlet Islamovich was the center and organizer of everything.

The SVC staff treated their leaders differently, and this was reflected in the way the employees called them in their circle.

Yuditsky, who did not attach much importance to ranks and appreciated primarily intelligence and business qualities, was simply called Davlet in the team. Akushsky's name was Grandfather, since he was noticeably older than the overwhelming majority of SVC specialists and, as they write, was distinguished by special snobbery - according to memoirs, it was impossible to imagine him with a soldering iron in his hand (most likely, he simply did not know which end to hold him by), and Davlet Islamovich did this more than once.

As part of Argun, which was an abbreviated version of the ISSK combat, it was planned to use 4 sets of 5E53 computers (1 in the Istra target radar, 1 in the anti-missile guidance radar and 2 in the command and control center), united into a single complex. The use of SOC also had negative aspects.As we have already said, comparison operations are non-modular and for their implementation requires a transition to the positional system and back, which leads to a monstrous drop in performance. VM Amerbaev and his team worked to solve this problem.

M.D.Kornev recalls:

At night, Vilzhan Mavlyutinovich thinks, in the morning he brings results to V.M.Radunsky (lead developer). The circuit engineers look at the hardware implementation of the new version, ask Amerbaev questions, he leaves to think again and so until his ideas succumb to a good hardware implementation.

Specific and system-wide algorithms were developed by the customer, and machine algorithms were developed at the SVC by a team of mathematicians headed by I. A. Bolshakov. During the development of the 5E53, the then still rare machine design was widely used at the SVC, as a rule, of its own design. The entire staff of the enterprise worked with extraordinary enthusiasm, not sparing themselves, for 12 or more hours a day.

V.M. Radunsky:

"Yesterday I worked so hard that, entering the apartment, I showed my wife a pass."

E. M. Zverev:

At that time there were complaints about the noise immunity of the 243 series ICs. Once at two o'clock in the morning, Davlet Islamovich came to the model, took the oscilloscope probes and for a long time he himself understood the causes of the interference.

In the 5E53 architecture, teams were divided into managerial and arithmetic teams. As in the K340A, each command word contained two commands that were executed by different devices simultaneously. One by one, an arithmetic operation was performed (on SOK-processors), the other - a managerial one: transfer from register to memory or from memory to register, conditional or unconditional jump, etc. on a traditional coprocessor, so it was possible to radically solve the problem of damn conditional jumps.

All the main processes were pipelined, as a result, several (up to 8) sequential operations were performed simultaneously. Harvard architecture has been preserved. The hardware layering of memory into 8 blocks with alternating block addressing was applied. This made it possible to access the memory with a processor clock frequency of 166 ns at a time of accessing information from RAM equal to 700 ns. Until 5E53, this approach was not implemented in hardware anywhere in the world; it was only described in an unrealized IBM 360/92 project.

A number of SVC specialists also proposed adding a full-fledged (not only for control) material processor and ensuring the real versatility of the computer. This was not done for two reasons.

Firstly, this was simply not required for the use of a computer as part of the ISSC.

Secondly, I. Ya. Akushsky, being a SOC fanatic, did not share the opinion about the lack of versatility of 5E53 and radically suppressed all attempts to introduce material sedition into it (apparently, this was his main role in the design of the machine).

RAM became a stumbling block for 5E53. The standard of Soviet memory at that time was ferrite blocks of huge dimensions, labor-intensive manufacturing and high power consumption. In addition, they were dozens of times slower than the processor, however, this did not prevent the ultraconservator Lebedev from sculpting his dearly beloved ferrite cubes everywhere - from BESM-6 to the onboard computer of the S-300 air defense missile system, produced in this form, on ferrites (!), up to the mid-1990s (!), largely due to this decision, this computer takes up a whole truck.


At the direction of FV Lukin, separate divisions of NIITT undertook to solve the problem of RAM, and the result of this work was the creation of memory on cylindrical magnetic films (CMP). The physics of the memory operation on the CMP is rather complicated, much more complicated than that of ferrites, but in the end, many scientific and engineering problems were solved, and the RAM on the CMP worked. To the possible disappointment of the patriots, we note that the concept of memory on magnetic domains (a special case of which is the CMF) was proposed for the first time not at NIITT. This kind of RAM was first introduced by one person, Bell Labs engineer Andrew H. Bobeck.Bobek was a renowned expert in magnetic technology, and he proposed revolutionary breakthroughs in RAM twice.

Invented by Jay Wright Forrester and independently by two Harvard scientists who worked on the Harward Mk IV project An Wang and Way-Dong Woo in 1949, the memory on ferrite cores (which he loved so much Lebedev) was imperfect not only due to its size, but also due to the colossal laboriousness of manufacturing (by the way, Wang An, almost unknown in our country, was one of the most famous computer architects and founded the famous Wang Laboratories, which existed from 1951 to 1992 and produced a large number of breakthrough technology, including the Wang 2200 mini-computer, cloned in the USSR as Iskra 226).

Returning to the ferrites, we note that the physical memory on them was simply huge, it would be extremely inconvenient to hang a 2x2 meter carpet next to a computer, so the ferrite chain mail was woven into small modules, like embroidery hoops, which caused the monstrous laboriousness of its manufacture. The most famous technique for weaving such 16x16 bit modules was developed by the British company Mullard (a very famous British company - a manufacturer of vacuum tubes, high-end amplifiers, televisions and radios, was also engaged in developments in the field of transistors and integrated circuits, later purchased by Phillips). The modules were connected in series in sections, from which ferrite cubes were mounted. It is obvious that errors were creeping into the process of weaving modules, and into the process of assembling ferrite cubes (the work was almost manual), which led to an increase in debugging and troubleshooting time.

It was thanks to the burning issue of the laboriousness of developing memory on ferrite rings that Andrew Bobek had the opportunity to show his inventive talent. Telephone giant AT&T, the creator of Bell Labs, was more interested than anyone in developing efficient magnetic memory technologies. Bobek decided to radically change the direction of research and the first question he asked himself was - is it necessary to use hard magnetic materials like ferrite as a material for storing residual magnetization? After all, they are not the only ones with a suitable memory implementation and a magnetic hysteresis loop. Bobek began experiments with permalloy, from which ring-shaped structures can be obtained simply by winding foil onto a carrier wire. He called it a twist cable (twist).

Having wound the tape in this way, it can be folded so as to create a zigzag matrix and pack it, for example, in plastic wrap. A unique feature of the twistor memory is the ability to read or write a whole line of permalloy pseudo-rings located on parallel twistor cables passing over one bus. This greatly simplified the design of the module.

So in 1967, Bobek developed one of the most effective modifications of magnetic memory of the time. The idea of ​​twistors impressed Bell's management so much that impressive efforts and resources were thrown into its commercialization. However, the obvious benefits associated with savings in the production of a twistor tape (it could be woven, in the truest sense of the word) were outweighed by research into the use of semiconductor elements. The appearance of SRAM and DRAM became a bolt from the blue for the telephone giant, especially since AT&T was more than ever close to concluding a lucrative contract with the US Air Force for the supply of twistor memory modules for their LIM-49 Nike Zeus air defense system (an approximate analogue of the A-35, which appeared a little later, we already wrote about it).

The telephone company itself was actively implementing a new kind of memory in its TSPS (Traffic Service Position System) switching system.Ultimately, the control computer for Zeus (Sperry UNIVAC TIC) still received a twistor memory, in addition, it was used in a number of AT & T projects almost until the mid-eighties of the last century, but in those years it was more agony than progress, as we see, not only in the USSR they knew how to push through the technology that was outdated for years.

However, there was one positive moment from the development of twistors.

Studying the magnetostrictive effect in combinations of permalloy films with orthoferrites (ferrites based on rare earth elements), Bobek noticed one of their features associated with magnetization. While experimenting with gadolinium gallium garnet (GGG), he used it as a substrate for a thin sheet of permalloy. In the resulting sandwich, in the absence of a magnetic field, the magnetization regions were arranged in the form of domains of various shapes.

Bobek looked at how such domains would behave in a magnetic field perpendicular to the magnetization regions of permalloy. To his surprise, as the strength of the magnetic field increased, the domains gathered in compact regions. Bobek called them bubbles. It was then that the idea of ​​bubble memory was formed, in which the carriers of the logical unit were the domains of spontaneous magnetization in the permalloy sheet - bubbles. Bobek learned to move bubbles across the surface of permalloy and came up with an ingenious solution to reading information in his new memory sample. Almost all the key players of that time and even NASA acquired the right to bubble memory, especially since bubble memory turned out to be almost insensitive to electromagnetic impulses and hard cure.


NIITT followed a similar path, and by 1971 independently developed a domestic version of the twistor - RAM with a total capacity of 7 Mbit with high timing characteristics: a sampling rate of 150 ns, a cycle time of 700 ns. Each block had a capacity of 256 Kbit, 4 such blocks were placed in the cabinet, the set included 7 cabinets.

The trouble was that back in 1965, Arnold Farber and Eugene Schlig of IBM built a prototype of a transistor memory cell, and Benjamin Agusta and his team created a 16-bit silicon chip based on the cell Farber-Schlig, containing 80 transistors, 64 resistors and 4 diodes. This is how an extremely efficient SRAM - static random-access memory was born, which put an end to the twistors at once.

Even worse for magnetic memory - in the same IBM a year later, under the leadership of Dr.Robert Dennard, the MOS process was mastered, and already in 1968 a prototype of dynamic memory appeared - DRAM (dynamic random-access memory).

In 1969, the Advanced Memory system began selling the first kilobyte chips, and a year later, the young company Intel, founded initially for the development of DRAM, presented an improved version of this technology, releasing its first chip, the Intel 1103 memory chip.

It was only ten years later that it was mastered in the USSR, when in the early 1980s the first Soviet memory microcircuit Angstrem 565RU1 (4 Kbit) and 128 Kbyte memory blocks based on it were released. Before that, the most powerful machines were content with ferrite cubes (Lebedev respected only the spirit of the old school) or domestic versions of twistors, in the development of which P.V. Nesterov, P.P.Silantyev, P.N.Petrov, V.A. N. T. Kopersako and others.


Another major problem was the construction of memory for storing programs and constants.

As you remember, in the K340A ROM was made on ferrite cores, information was entered into such memory using a technology very similar to sewing: the wire was naturally stitched with a needle through a hole in the ferrite (since then the term “firmware” has taken root in the process of entering information into any ROM). In addition to the laboriousness of the process, it is almost impossible to change the information in such a device. Therefore, a different architecture was used for 5E53. On the printed circuit board, a system of orthogonal buses was implemented: address and bit.To organize inductive communication between the address and bit buses, a closed loop of communication was or was not superimposed on their intersection (at NIIVK for M-9 capacitive coupling was installed). The coils were placed on a thin board, which is tightly pressed against the bus matrix - by manually changing the card (moreover, without turning off the computer), they changed the information.

For 5E53, a data ROM was developed with a total capacity of 2.9 Mbit with rather high time characteristics for such a primitive technology: a sampling rate of 150 ns, a cycle time of 350 ns. Each block had a capacity of 72 kbit, 8 blocks with a total capacity of 576 kbit were placed in the cabinet, the computer set included 5 cabinets. As an external memory of large capacity, a memory device based on a unique optical tape was developed. Recording and reading was carried out using light-emitting diodes on photographic film, as a result, the capacity of the tape with the same dimensions increased by two orders of magnitude compared to the magnetic one and reached 3 Gbit. For missile defense systems, this was an attractive solution, since their programs and constants had a huge volume, but they changed very rarely.

The main element base of 5E53 was already known to us GIS "Path" and "Ambassador", but their performance was in some cases lacking, therefore the specialists of the SIC (including the very same V.L.Dshkhunyan - later the father of the first original domestic microprocessor!) And the Exiton plant "A special series of GIS was developed based on unsaturated elements with reduced supply voltage, increased speed and internal redundancy (series 243," Cone "). For NIIME RAM, special amplifiers, the Ishim series, have been developed.

A compact design was developed for 5E53, which includes 3 levels: cabinet, block, cell. The cabinet was small: width at the front - 80 cm, depth - 60 cm, height - 180 cm. The cabinet contained 4 rows of blocks of 25 in each. The power supplies were placed on top. Air cooling fans were placed under the blocks. The block was a switching board in a metal frame, cells were laid on one of the board surfaces. Intercell and inter-unit installation was carried out by wrapping (not even soldering!).

This was argued by the fact that there was no equipment for automated high-quality soldering in the USSR, and to solder it by hand - you can go crazy, and the quality will suffer. As a result, the testing and operation of the equipment proved a significantly higher reliability of the Soviet wrap, in comparison with the Soviet soldering. In addition, wrap-around installation was much more technologically advanced in production: both during setup and repair.

In low-tech conditions, wrapping is much safer: there is no hot soldering iron and solder, there are no fluxes and their subsequent cleaning is not required, conductors are excluded from excessive spreading of solder, there is no local overheating, which sometimes spoils the elements, etc. To implement the installation by the wire-wrap method, MEP enterprises have developed and produced special connectors and an assembly tool in the form of a pistol and a pencil.

The cells were made on fiberglass boards with double-sided printed wiring. In general, this was a rare example of an extremely successful architecture of the system as a whole - unlike 90% of computer developers in the USSR, the creators of the 5E53 took care not only of power, but also of the convenience of installation, maintenance, cooling, power distribution and other trifles. Remember this moment, it will come in handy when comparing 5E53 with the creation of ITMiVT - "Elbrus", "Electronics SS BIS" and others.

One SOK processor was not enough for reliability and it was necessary to majorize all the components of the machine in a triple copy.

In 1971, 5E53 was ready.

Compared to Almaz, the base system (by 17, 19, 23, 25, 26, 27, 29, 31) and the bit depth of data (20 and 40 bits) and commands (72 bits) were changed. The clock frequency of the SOK processor is 6.0 MHz, the performance is 10 million algorithmic operations per second on missile defense tasks (40 MIPS), 6, 6 MIPS on one modular processor.The number of processors is 8 (4 modular and 4 binary). Power consumption - 60 kW. The average uptime is 600 hours (M-9 Kartsev has 90 hours).

The development of 5E53 was carried out in a record short time - in a year and a half. At the beginning of 1971, it ended. 160 types of cells, 325 types of subunits, 12 types of power supplies, 7 types of cabinets, engineering control panel, weight of stands. A prototype was made and tested.

A huge role in the project was played by the military representatives, who turned out to be not only meticulous, but also intelligent: V. N. Kalenov, A. I. Abramov, E. S. Klenzer and T. N. Remezova. They constantly monitored the compliance of the product with the requirements of the technical task, brought to the team the experience gained from participating in the development of previous places, and held back the radical hobbies of the developers.

Yu.N. Cherkasov recalls:

It was a pleasure to work with Vyacheslav Nikolaevich Kalenov. His exactingness has always been recognized. He strove to understand the essence of the proposed and, if he found it interesting, went to any conceivable and inconceivable measures to implement the proposal. When, two months before the completion of the development of data transmission equipment, I proposed its radical revision, as a result of which its volume was reduced by three times, he closed the outstanding work to me ahead of schedule under the promise to carry out the revision in the remaining 2 months. As a result, instead of three cabinets and 46 types of subunits, one cabinet and 9 types of subunits remained, performing the same functions, but with higher reliability.

Kalenov also insisted on carrying out full qualification tests of the machine:

I insisted on carrying out tests, and the chief engineer Yu. D. Sasov categorically objected, believing that everything was fine and testing was a waste of effort, money and time. I was supported by the deputy. chief designer N. N. Antipov, who has extensive experience in the development and production of military equipment.

Yuditsky, who also has extensive debugging experience, supported the initiative and turned out to be right: the tests showed a lot of minor flaws and defects. As a result, the cells and subunits were finalized, and the chief engineer Sasov was dismissed from his post. To facilitate the development of computers in serial production, a group of ZEMZ specialists was sent to the SVTs. Malashevich (at this time a conscript) recalls how his friend G.M.Bondarev said:

This is an amazing machine, we have not heard of anything like it. It contains a lot of new original solutions. Studying the documentation, we learned a lot, learned a lot.

He said this with such enthusiasm that BM Malashevich, after finishing his service, did not return to ZEMZ, but went to work at the SVTs.


At the Balkhash training ground, preparations were in full swing for the launch of a 4-machine complex. The Argun equipment has basically already been installed and adjusted, while in conjunction with the 5E92b. The engine room for four 5E53s was ready and awaiting delivery of the machines.

In the archive of F.V. Lukin, a sketch of the layout of the electronic equipment of the MKSK has been preserved, in which the locations of the computers are also indicated. On February 27, 1971, eight sets of design documentation (97,272 sheets each) were delivered to ZEMZ. Preparation for production began and …

The ordered, approved, passed all tests, accepted for production, the machine was never released! We will talk about what happened next time.

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